Image sensors generally convert optical images into electrical signals used by a processor to portray the image on a display device or present image data to a system. The image sensor may be designed and fabricated using a complementary metal oxide semiconductor (CMOS) process. CMOS image sensors have advantages because they result from relatively low cost and stable, well-known, manufacturing processes developed in manufacture of high volumes of CMOS-based devices used for digital and analog circuits. Some portions of a pixel may require some specialized processes which are also highly controllable.
CMOS image sensors are formed in arrays of pixels, where a pixel consists of the region within which individual detectors and detector support circuits reside. Typically, the pixels in a column share the output terminal. Row signals select the particular row of pixels within a column. Activating the row select switch connects the pixel to the column signal line which provides the pixel signal and electrical path to a column terminal point. The terminal point may be connected to circuits which condition the pixel-generated signal. Typically an on or off chip image processor receives the column output signals and uses them to generate an electrical signal representative of the taken image. The signal many be displayed or used as data. The display may take many forms and is of particular interest for mounted night vision devices.
High dynamic range provides advantages to night vision devices. They should provide good imaging information at very low levels of light, but still produce useful images at higher levels of light. Low light level imaging requires relatively high gain in the column processor to overcome backend noise such as an on-chip analog-to-digital converter (ADC). This can limit the signal to only a few thousand electrons before amplifier saturation. On the other hand high light imaging requires lower gain column processing and saturation can be for example tens of thousands of electrons. The noise floor is however higher for the low gain case. This high dynamic range requirement, for example from 1 electron noise floor to 30,000 electrons full scale gives rise to many challenges. One approach uses two analog-to-digital converters (ADC) for each column.
A first ADC resides in a high gain channel, having good immunity to noise but saturates at relatively low light levels. A second ADC resides in a low gain channel that allows much higher input signals, but suffers from relatively high noise. In this approach the outputs of the two ADCs for each column in the pixel array is spliced to form a single data signal with fewer bits and relatively high dynamic range. However, this approach results in more hardware and a larger package.
Another approach reduces the number of ADCs per column to one or less by using in-column nonlinear response to the pixel signal, a process that expands the output at lower light levels and compresses it at higher light levels. This provides relatively high dynamic range with lower costs and reduced hardware complexity. The desire for even higher dynamic range still exists. The particular compression used depends on the noise characteristics of the pixel and column processing circuits.